Enum: CpuArchitectureIdEnum
The normalized identifier of the CPU architecture.
URI: ocsf:CpuArchitectureIdEnum
Permissible Values
| Value | Meaning | Description |
|---|---|---|
| UNKNOWN | None | The CPU architecture is unknown |
| X86 | None | CPU uses the x86 ISA |
| ARM | None | CPU uses the ARM ISA |
| RISC_V | None | CPU uses the RISC-V ISA |
| OTHER | None | The CPU architecture is not mapped |
Slots
| Name | Description |
|---|---|
| cpu_architecture_id | The normalized identifier of the CPU architecture |
Identifier and Mapping Information
Schema Source
- from schema: https://w3id.org/lmodel/ocsf
LinkML Source
name: CpuArchitectureIdEnum
description: The normalized identifier of the CPU architecture.
from_schema: https://w3id.org/lmodel/ocsf
rank: 1000
permissible_values:
UNKNOWN:
text: UNKNOWN
description: The CPU architecture is unknown.
annotations:
ocsf_uid:
tag: ocsf_uid
value: '0'
caption:
tag: caption
value: Unknown
X86:
text: X86
description: CPU uses the x86 ISA. For bitness, refer to <code>cpu_bits</code>.
annotations:
ocsf_uid:
tag: ocsf_uid
value: '1'
caption:
tag: caption
value: x86
ARM:
text: ARM
description: CPU uses the ARM ISA. For bitness, refer to <code>cpu_bits</code>.
annotations:
ocsf_uid:
tag: ocsf_uid
value: '2'
caption:
tag: caption
value: ARM
RISC_V:
text: RISC_V
description: CPU uses the RISC-V ISA. For bitness, refer to <code>cpu_bits</code>.
annotations:
ocsf_uid:
tag: ocsf_uid
value: '3'
caption:
tag: caption
value: RISC-V
OTHER:
text: OTHER
description: 'The CPU architecture is not mapped. See the <code>cpu_architecture</code>
attribute, which contains a data source specific value.'
annotations:
ocsf_uid:
tag: ocsf_uid
value: '99'
caption:
tag: caption
value: Other